FPGA - PCB Co-Design Done The Right Way (CHALK TALK)
Today's complex, high-pin-count FPGAs present a special problem for board designers as issues of timing, routability, cost, and signal integrity can defeat old-school "over the wall" design flows.
In this Chalk Talk, Amelia Dalton chats with Hemant Shah of Cadence about about bridging the gap between FPGA design and PCB design.
We'll discuss how new technology from Cadence can address these problems, simplifying FPGA-PCB co-design, reducing schedules, and decreasing cost. Also, remember to click the paper clip on the viewer so you can download a wealth of information that supports this webcast including a feature story, press release, product datasheet, whitepaper, a blog, as well as an upcoming live demo and webinar.
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Speaker: Hemant Shah is the Product Marketing Director for High-Speed Products at Cadence. He holds a B.S. in Electrical Engineering and a M.S. in Computer Science.
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